# |
NAME |
DIR |
[LSB:MSB] |
SIG |
ATTRIBUTES |
89H
|
fpga_0_radio_bridge_slot_2_radio_RX_ADC_DCS_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RX_ADC_DCS |
|
90H
|
fpga_0_radio_bridge_slot_2_radio_RX_ADC_DFS_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RX_ADC_DFS |
|
91H
|
fpga_0_radio_bridge_slot_2_radio_RX_ADC_PWDNA_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RX_ADC_PWDNA |
|
92H
|
fpga_0_radio_bridge_slot_2_radio_RX_ADC_PWDNB_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RX_ADC_PWDNB |
|
93H
|
fpga_0_radio_bridge_slot_2_radio_RxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RxEn |
|
94H
|
fpga_0_radio_bridge_slot_2_radio_RxHP_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_RxHP |
|
95H
|
fpga_0_radio_bridge_slot_2_radio_SHDN_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_SHDN |
|
96H
|
fpga_0_radio_bridge_slot_2_radio_TxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_TxEn |
|
97H
|
fpga_0_radio_bridge_slot_2_radio_dac_RESET_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_dac_RESET |
|
98H
|
fpga_0_radio_bridge_slot_2_radio_spi_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_spi_clk |
|
99H
|
fpga_0_radio_bridge_slot_2_radio_spi_cs_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_spi_cs |
|
100H
|
fpga_0_radio_bridge_slot_2_radio_spi_data_pin |
O |
1 |
fpga_0_radio_bridge_slot_2_radio_spi_data |
|
101I
|
fpga_0_radio_bridge_slot_3_radio_ADC_I_pin |
I |
13:0 |
fpga_0_radio_bridge_slot_3_radio_ADC_I |
|
102I
|
fpga_0_radio_bridge_slot_3_radio_ADC_Q_pin |
I |
13:0 |
fpga_0_radio_bridge_slot_3_radio_ADC_Q |
|
103I
|
fpga_0_radio_bridge_slot_3_radio_DIPSW_pin |
I |
3:0 |
fpga_0_radio_bridge_slot_3_radio_DIPSW |
|
104I
|
fpga_0_radio_bridge_slot_3_radio_LD_pin |
I |
1 |
fpga_0_radio_bridge_slot_3_radio_LD |
|
105I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_D_pin |
I |
9:0 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_D |
|
106I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_OTR_pin |
I |
1 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_OTR |
|
107I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_OTRA_pin |
I |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_OTRA |
|
108I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_OTRB_pin |
I |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_OTRB |
|
109I
|
fpga_0_radio_bridge_slot_3_radio_dac_PLL_LOCK_pin |
I |
1 |
fpga_0_radio_bridge_slot_3_radio_dac_PLL_LOCK |
|
110I
|
fpga_0_radio_bridge_slot_3_radio_EEPROM_IO |
IO |
1 |
fpga_0_radio_bridge_slot_3_radio_EEPROM_IO |
|
111I
|
fpga_0_radio_bridge_slot_3_converter_clock_out_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_converter_clock_out |
|
112I
|
fpga_0_radio_bridge_slot_3_dac_spi_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_dac_spi_clk |
|
113I
|
fpga_0_radio_bridge_slot_3_dac_spi_cs_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_dac_spi_cs |
|
114I
|
fpga_0_radio_bridge_slot_3_dac_spi_data_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_dac_spi_data |
|
115I
|
fpga_0_radio_bridge_slot_3_radio_24PA_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_24PA |
|
116I
|
fpga_0_radio_bridge_slot_3_radio_5PA_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_5PA |
|
117I
|
fpga_0_radio_bridge_slot_3_radio_ANTSW_pin |
O |
1:0 |
fpga_0_radio_bridge_slot_3_radio_ANTSW |
|
118I
|
fpga_0_radio_bridge_slot_3_radio_B_pin |
O |
6:0 |
fpga_0_radio_bridge_slot_3_radio_B |
|
119I
|
fpga_0_radio_bridge_slot_3_radio_DAC_I_pin |
O |
15:0 |
fpga_0_radio_bridge_slot_3_radio_DAC_I |
|
120I
|
fpga_0_radio_bridge_slot_3_radio_DAC_Q_pin |
O |
15:0 |
fpga_0_radio_bridge_slot_3_radio_DAC_Q |
|
121I
|
fpga_0_radio_bridge_slot_3_radio_LED_pin |
O |
2:0 |
fpga_0_radio_bridge_slot_3_radio_LED |
|
122I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_CLAMP_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_CLAMP |
|
123I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_HIZ_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_HIZ |
|
124I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_SLEEP_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_SLEEP |
|
125I
|
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RSSI_ADC_clk |
|
126I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_DCS_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_DCS |
|
127I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_DFS_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_DFS |
|
128I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_PWDNA_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_PWDNA |
|
129I
|
fpga_0_radio_bridge_slot_3_radio_RX_ADC_PWDNB_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RX_ADC_PWDNB |
|
130I
|
fpga_0_radio_bridge_slot_3_radio_RxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RxEn |
|
131I
|
fpga_0_radio_bridge_slot_3_radio_RxHP_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_RxHP |
|
132I
|
fpga_0_radio_bridge_slot_3_radio_SHDN_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_SHDN |
|
133I
|
fpga_0_radio_bridge_slot_3_radio_TxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_TxEn |
|
134I
|
fpga_0_radio_bridge_slot_3_radio_dac_RESET_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_dac_RESET |
|
135I
|
fpga_0_radio_bridge_slot_3_radio_spi_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_spi_clk |
|
136I
|
fpga_0_radio_bridge_slot_3_radio_spi_cs_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_spi_cs |
|
137I
|
fpga_0_radio_bridge_slot_3_radio_spi_data_pin |
O |
1 |
fpga_0_radio_bridge_slot_3_radio_spi_data |
|
138J
|
fpga_0_radio_bridge_slot_4_radio_ADC_I_pin |
I |
13:0 |
fpga_0_radio_bridge_slot_4_radio_ADC_I |
|
139J
|
fpga_0_radio_bridge_slot_4_radio_ADC_Q_pin |
I |
13:0 |
fpga_0_radio_bridge_slot_4_radio_ADC_Q |
|
140J
|
fpga_0_radio_bridge_slot_4_radio_DIPSW_pin |
I |
3:0 |
fpga_0_radio_bridge_slot_4_radio_DIPSW |
|
141J
|
fpga_0_radio_bridge_slot_4_radio_LD_pin |
I |
1 |
fpga_0_radio_bridge_slot_4_radio_LD |
|
142J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_D_pin |
I |
9:0 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_D |
|
143J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_OTR_pin |
I |
1 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_OTR |
|
144J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_OTRA_pin |
I |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_OTRA |
|
145J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_OTRB_pin |
I |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_OTRB |
|
146J
|
fpga_0_radio_bridge_slot_4_radio_dac_PLL_LOCK_pin |
I |
1 |
fpga_0_radio_bridge_slot_4_radio_dac_PLL_LOCK |
|
147J
|
fpga_0_radio_bridge_slot_4_radio_EEPROM_IO |
IO |
1 |
fpga_0_radio_bridge_slot_4_radio_EEPROM_IO |
|
148J
|
fpga_0_radio_bridge_slot_4_converter_clock_out_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_converter_clock_out |
|
149J
|
fpga_0_radio_bridge_slot_4_dac_spi_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_dac_spi_clk |
|
150J
|
fpga_0_radio_bridge_slot_4_dac_spi_cs_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_dac_spi_cs |
|
151J
|
fpga_0_radio_bridge_slot_4_dac_spi_data_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_dac_spi_data |
|
152J
|
fpga_0_radio_bridge_slot_4_radio_24PA_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_24PA |
|
153J
|
fpga_0_radio_bridge_slot_4_radio_5PA_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_5PA |
|
154J
|
fpga_0_radio_bridge_slot_4_radio_ANTSW_pin |
O |
1:0 |
fpga_0_radio_bridge_slot_4_radio_ANTSW |
|
155J
|
fpga_0_radio_bridge_slot_4_radio_B_pin |
O |
6:0 |
fpga_0_radio_bridge_slot_4_radio_B |
|
156J
|
fpga_0_radio_bridge_slot_4_radio_DAC_I_pin |
O |
15:0 |
fpga_0_radio_bridge_slot_4_radio_DAC_I |
|
157J
|
fpga_0_radio_bridge_slot_4_radio_DAC_Q_pin |
O |
15:0 |
fpga_0_radio_bridge_slot_4_radio_DAC_Q |
|
158J
|
fpga_0_radio_bridge_slot_4_radio_LED_pin |
O |
2:0 |
fpga_0_radio_bridge_slot_4_radio_LED |
|
159J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_CLAMP_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_CLAMP |
|
160J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_HIZ_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_HIZ |
|
161J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_SLEEP_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_SLEEP |
|
162J
|
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RSSI_ADC_clk |
|
163J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_DCS_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_DCS |
|
164J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_DFS_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_DFS |
|
165J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_PWDNA_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_PWDNA |
|
166J
|
fpga_0_radio_bridge_slot_4_radio_RX_ADC_PWDNB_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RX_ADC_PWDNB |
|
167J
|
fpga_0_radio_bridge_slot_4_radio_RxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RxEn |
|
168J
|
fpga_0_radio_bridge_slot_4_radio_RxHP_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_RxHP |
|
169J
|
fpga_0_radio_bridge_slot_4_radio_SHDN_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_SHDN |
|
170J
|
fpga_0_radio_bridge_slot_4_radio_TxEn_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_TxEn |
|
171J
|
fpga_0_radio_bridge_slot_4_radio_dac_RESET_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_dac_RESET |
|
172J
|
fpga_0_radio_bridge_slot_4_radio_spi_clk_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_spi_clk |
|
173J
|
fpga_0_radio_bridge_slot_4_radio_spi_cs_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_spi_cs |
|
174J
|
fpga_0_radio_bridge_slot_4_radio_spi_data_pin |
O |
1 |
fpga_0_radio_bridge_slot_4_radio_spi_data |
|
175K
|
fpga_0_rs232_RX_pin |
I |
1 |
fpga_0_rs232_RX |
|
176K
|
fpga_0_rs232_TX_pin |
O |
1 |
fpga_0_rs232_TX |
|
|