root/PlatformSupport/WARPMAC/warpmac.c

/*! \file warpmac.c
 \brief This framework allows for custom MAC implementations on WARP.
 
 @version 10
 @author Chris Hunter and Patrick Murphy
 
 This code is a collection of high-level and low-level functions to enable custom MAC layers on warp.
 At the highest level, these functions provide many MAC commonalities like carrier sensing and random
 exponential backoffs. At the lowest level, these functions wrap around hardware drivers to provide
 give user code access to features of the PHY, radio controller, and many other peripherals.
 */

#include "xparameters.h"
#include "xstatus.h"
#include "errno.h"
#include "xexception_l.h"
#include "stddef.h"
#include "stdio.h"
#include "string.h"
#include "xdmacentral.h"
#include "xdmacentral_l.h"
#include "xemaclite.h"
#include "xemaclite_l.h"
#include "xuartlite.h"
#include "xuartlite_l.h"
#include "xintc.h"
#include "xgpio.h"
#include "warpmac.h"
#include "ofdm_txrx_mimo_regMacros.h"
#include "ofdm_agc_mimo_regMacros.h"
#include "ofdm_pktdetector_mimo_regMacros.h"
#include "warp_timer_regMacros.h"
#include "radio_controller_basic.h"
#include "radio_controller_ext.h"
#include "radio_controller_adv.h"
#include "warp_userio.h"
#include "warpphy.h"
#include "warpnet.h"

//Instantiates the Maccontrol control structure
Maccontrol controlStruct;

unsigned char timerIntStatus;

//Instantiates the general-purpose input-output peripheral driver
static XGpio GPIO_UserIO;

//Instantiates the Xilinx interrupt controller peripheral driver
static XIntc Intc;

//Instantiates the UART driver instance
static XUartLite UartLite;
unsigned char ReceiveBuffer[16];

//Instantiates Ethernet MAC lite
static XEmacLite EmacLiteInstance;   /* Instance of the EmacLite */
static XEmacLite_Config *EmacLiteConfigPtr;
unsigned char currentEmacBuff;

//Instantiates central DMA controller
static XDmaCentral DmaCentralInst;
static XDmaCentral_Config *DMAConfigPtr;

//Points to a user-provided Macframe where parsed header information will be copied to
Macframe* rxPacket;
//Points to a user-provided Macframe where parsed header information will be copied from
Macframe* txPacket;

//Global variable for tracking active LED outputs
unsigned int LEDHEX_Outputs;
unsigned int ledStates;
unsigned int leftHex;
unsigned int rightHex;

//"Low" LED states
unsigned int ledStatesLow[2];
unsigned char ledStatesIndexLow;
//"High" LED states
unsigned int ledStatesHigh[2];
unsigned char ledStatesIndexHigh;
//Dip-switch State
unsigned char dipswState;

//Global variable to track SISO vs. MIMO mode
unsigned char warpmac_sisoMode;

//These the addresses pointed to by these variables are set by the
//user via the callback registration functions

void (*usr_upbutton) ();
void (*usr_leftbutton) ();
void (*usr_middlebutton) ();
void (*usr_rightbutton) ();
void (*usr_badHeaderCallback) ();
void (*usr_goodHeaderCallback) ();
void (*usr_timerCallback) ();
void (*usr_emacCallback) ();
void (*usr_uartRecvCallback) ();
void (*usr_rxDoneCallback) ();

//Null handler. Catches calls if user fails to attach callbacks.
void nullCallback(void* param){};

///@brief Initializes the framework and all hardware peripherals.
///
///This function sets reasonable default values for many of the parameters of the MAC, configures
///interrupts and exceptions, configures Ethernet, and finally initializes the custom peripherals
///such as the radio controller, the PHY, the packet detector, and the automatic gain control block.
void warpmac_init() {
        
        xil_printf("Initializing WARPMAC v10:\r\n");

        //Initialize global variables
        LEDHEX_Outputs = 0;
        ledStates = 0;
        leftHex = 0;
        rightHex = 0;
        ledStatesLow[0] = 1;
        ledStatesLow[1] = 2;
        ledStatesIndexLow = 0;
        ledStatesHigh[0] = 4;
        ledStatesHigh[1] = 8;
        ledStatesIndexHigh = 0;
        warpmac_sisoMode = 1;

        XStatus Status;
        
        //Assign a null handler to all the interrupts; the user can re-define these later if desired
        usr_upbutton = nullCallback;
        usr_leftbutton = nullCallback;
        usr_middlebutton = nullCallback;
        usr_rightbutton = nullCallback;
        usr_badHeaderCallback = nullCallback;
        usr_goodHeaderCallback = nullCallback;
        usr_timerCallback = nullCallback;
        usr_uartRecvCallback = nullCallback;
        usr_rxDoneCallback = nullCallback;
        
        //Initialize the PHY
        warpphy_init();
        
        /*********************MAC Parameters*************************/
        xil_printf("    Initializing controlStruct...");
        controlStruct.maxReSend = 4;
        controlStruct.currBackoff = 0;
        controlStruct.maxBackoff = 5;
        controlStruct.rxBuffIndex = 2;
        warpphy_setBuffs(controlStruct.txBuffIndex, controlStruct.rxBuffIndex);
        xil_printf("complete!\r\n");
        /************************************************************/
        
        /************************UART*****************************/
        XUartLite_Initialize(&UartLite, XPAR_UARTLITE_0_DEVICE_ID);
//    XUartLite_SetSendHandler(&UartLite, warpmac_uartSendHandler, &UartLite);
//  XUartLite_SetRecvHandler(&UartLite, warpmac_uartRecvHandler, &UartLite);

    XUartLite_EnableInterrupt(&UartLite);
        /************************************************************/

        /************************USER IO*****************************/
        xil_printf("    Initializing UserIO...");
        //Initialize the UserIO GPIO core
        Status = XGpio_Initialize(&GPIO_UserIO, XPAR_USER_IO_DEVICE_ID);
        
        //We use both channels in the GPIO core- one for inputs, one for outputs
        XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_INPUTS, USERIO_MASK_INPUTS);
        XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, 0);
        
        //Make sure the LEDs are all off by default
        XGpio_DiscreteClear(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, USERIO_MASK_OUTPUTS);
        
        //Configure & enable the GPIO interrupt output
        // The interrupt is only enabled for the GPIO input channel
    XGpio_InterruptEnable(&GPIO_UserIO, USERIO_CHAN_INPUTS);
    XGpio_InterruptGlobalEnable(&GPIO_UserIO);
        xil_printf("complete!\r\n");
        /************************************************************/
        
        /***********************Interrupts***************************/
        xil_printf("    Initializing Interrupts...");
        //Initialize the interrupt controller
        XIntc_Initialize(&Intc, INTC_DEVICE_ID);
        XIntc_SetIntrSvcOption(XPAR_XPS_INTC_0_BASEADDR,XIN_SVC_ALL_ISRS_OPTION);
        
        //Connect the interrupt controller to the interrupt handlers
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_BADPKT_INTR,(XInterruptHandler)phyRx_badHeader_int_handler, NULL); //Workaround... bad PHY state
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_USER_IO_IP2INTC_IRPT_INTR, (XInterruptHandler)userIO_int_handler, &GPIO_UserIO);
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_BADHEADER_INTR,(XInterruptHandler)phyRx_badHeader_int_handler, NULL);
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_GOODHEADER_INTR,(XInterruptHandler)phyRx_goodHeader_int_handler, NULL);
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_WARP_TIMER_PLBW_0_TIMEREXPIRE_INTR,(XInterruptHandler)timer_int_handler, NULL);
        XIntc_Connect(&Intc, XPAR_XPS_INTC_0_RS232_INTERRUPT_INTR, (XInterruptHandler)warpmac_uartRecvHandler, (void *)&UartLite);

        xil_printf("complete!\r\n");
        /************************************************************/
        
        /*************************Ethernet***************************/
        xil_printf("    Initializing Ethernet...");
        //Initialize the EMAC config struct
        EmacLiteConfigPtr = XEmacLite_LookupConfig(EMACLITE_DEVICE_ID);
        if (EmacLiteConfigPtr == NULL){
                ErrorTrap("EMAClite LookupConfig failed!\r\n");
                return;
        }
        
        Status = XEmacLite_CfgInitialize(&EmacLiteInstance, EmacLiteConfigPtr, EmacLiteConfigPtr->BaseAddress);
        if (Status != XST_SUCCESS){
                ErrorTrap("EMAClite CfgInitialize failed!\r\n");
                return;
        }

        XEmacLite_FlushReceive(&EmacLiteInstance);
        currentEmacBuff = PING;
        xil_printf("complete!\r\n");
        /************************************************************/
        
        /**************************DMA*******************************/
        //Lookup the DMA configuration information
        DMAConfigPtr = XDmaCentral_LookupConfig(DMA_CTRL_DEVICE_ID);
        
        //Initialize the config struct
        Status = XDmaCentral_CfgInitialize(&DmaCentralInst, DMAConfigPtr, DMAConfigPtr->BaseAddress);
        if (Status != XST_SUCCESS){
                ErrorTrap("DMA CfgInitialize failed!\r\n");
                return;
        }
        
        //Set the DMA addressing options
        // XDMC_DMACR_SOURCE_INCR_MASK - increment src address on each beat
        // XDMC_DMACR_DEST_INCR_MASK - increment dst address on each beat
        XDmaCentral_SetControl(&DmaCentralInst, XDMC_DMACR_SOURCE_INCR_MASK | XDMC_DMACR_DEST_INCR_MASK);
        /************************************************************/
        
        /*************************Ethernet***************************/
        //Start the interrupt controller and enable the interrupts
        XIntc_Start(&Intc, XIN_REAL_MODE);
        XIntc_Enable(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_BADPKT_INTR);
        XIntc_Enable(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_BADHEADER_INTR);
        XIntc_Enable(&Intc, XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_GOODHEADER_INTR);
    XIntc_Enable(&Intc, XPAR_XPS_INTC_0_USER_IO_IP2INTC_IRPT_INTR);
        XIntc_Enable(&Intc, XPAR_XPS_INTC_0_WARP_TIMER_PLBW_0_TIMEREXPIRE_INTR);
        XIntc_Enable(&Intc, XPAR_XPS_INTC_0_RS232_INTERRUPT_INTR);
        /************************************************************/
        
        /************************Exceptions**************************/
        xil_printf("    Enabling Exceptions...");
        XExc_Init();
        XExc_RegisterHandler(XEXC_ID_NON_CRITICAL_INT,(XExceptionHandler)XIntc_InterruptHandler,&Intc);
        XExc_mEnableExceptions(XEXC_NON_CRITICAL);
        xil_printf("complete!\r\n");
        /************************************************************/
        
        /*********************Final EMAC/DMA*************************/
        //Clear any stale EMAC interrupts
        XEmacLite_FlushReceive(&EmacLiteInstance);
        //Disable the EMAC interrupt output
        XEmacLite_DisableInterrupts(&EmacLiteInstance);
        //Disable Interrupts
        XDmaCentral_InterruptEnableSet(&DmaCentralInst, 0);
        /************************************************************/
        
        
        //Manually call the UserIO ISR once to store the initial value of the buttons/switches
        //This is especially important for applications where the value of the DIP switch means something at boot
        userIO_int_handler((void *)&GPIO_UserIO);
        
}

///@brief "Good Header" Interrupt handler for the PHY layer.
///
///This function is the ISR for the RX physical layer peripheral.
///This function is only called if the packet header has no bit errors
///(i.e., the packet header passes CRCs in the PHY). This interrupt will
///be asserted *before* the packet is fully received. This function assumes
///the user's callback will poll the PHY to determine if the packet is eventually
///good or bad
void phyRx_goodHeader_int_handler() {   
        unsigned int numPayloadBytes;
        int length;
        
        //Copy the received packet's header into the rxPacket struct
        memcpy((unsigned char *)(&(rxPacket->header)), (unsigned char *)warpphy_getBuffAddr(controlStruct.rxBuffIndex), (size_t)NUM_HEADER_BYTES);
        
        //Strip the header and checksum from the total number of bytes reported to user code
        if(rxPacket->header.length == NUM_HEADER_BYTES){
                //Header-only packet (like an ACK) has 0 payload bytes
                rxPacket->header.length = 0;
        }
        else{
                //Other packets have payload bytes; subtract off header and 4-byte payload checksum lengths
                rxPacket->header.length = rxPacket->header.length - NUM_HEADER_BYTES - 4;
        }
        
        //If the Rx packet is too big, ignore the payload
        // This should never happen; the Tx code will never send a pkt bigger than Ethernet MTU
        if(rxPacket->header.length>MY_XEM_MAX_FRAME_SIZE){
                rxPacket->header.length = 0;
        }
        
        //Pass the received packet to the user handler
        usr_goodHeaderCallback(rxPacket);
        
        unsigned char state = INCOMPLETE;
        //Poll PHY to insure ISR does not quit too early
                                while(state==INCOMPLETE){
                                        //Blocks until the PHY reports the received packet as either good or bad
                                        state = warpphy_pollRxStatus();
                                }
                                
        //Clears every interrupt output of the PHY
        warpphy_clearRxInterrupts();
        XIntc_Acknowledge(&Intc,XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_GOODHEADER_INTR);

        //Call the user function after everything is done receiving the packet
        usr_rxDoneCallback();

        return;
}

///@brief "Bad" Interrupt handler for the PHY layer.
///
///This function is the ISR for the RX physical layer peripheral.
///This function is only called if the packet fails CRC. The received
///packet is passed to the user's callback, and the PHY is reset.
void phyRx_badHeader_int_handler(){
        //Bad packets, by definition, have no payload bytes which can be trusted
        // The user handler is called with no arguments, since there is no real packet data to process
        // If the header happend to be good but the payload bad, the user should use the good header
        // interrupt to process the header
        usr_badHeaderCallback();
        
        //Clear the good/bad packet interrupts in the PHY to re-enable packet reception
        warpphy_clearRxInterrupts();
        
        XIntc_Acknowledge(&Intc,XPAR_XPS_INTC_0_OFDM_TXRX_MIMO_PLBW_0_RX_INT_BADHEADER_INTR);

        //Call the user function after everything is done receiving the packet
        usr_rxDoneCallback();

        return;
}


///@brief Handles the reception of packets from the emac core.
///
///This function is the ISR for the EMAC. It starts a DMA transfer
///of the payload into the PHY's packet buffer and calls the user's
///callback to further processing.
///Note: The function name is a bit of a misnomer with this release
///of the reference design. Interrupts have been removed for performance
///reasons. However, in the interest of symmetry and legacy, the
///"int_handler" moniker is left in place.
void emacRx_int_handler(void *CallBackRef){
        XIntc_Acknowledge(&Intc,XPAR_XPS_INTC_0_ETHERNET_MAC_IP2INTC_IRPT_INTR);
        
        int waitForDMA = 0;
        
        XEmacLite *EmacLiteInstPtr;
        unsigned int RxPktBaseAddress,RxPktBaseAddressPing,RxPktBaseAddressPong;
        unsigned int StatusRegister,StatusRegister2;
        unsigned short RxPktLength, RxPktLengthType;
        
        //Convert the arg to something useful
        EmacLiteInstPtr = (XEmacLite *)CallBackRef;
        
        //Lookup which EMAC Rx pkt buffer has the new packet
        RxPktBaseAddressPing = (EmacLiteInstPtr)->EmacLiteConfig.BaseAddress;
        StatusRegister = XEmacLite_mGetRxStatus(RxPktBaseAddressPing);
        
        if ((currentEmacBuff==PING) && ((StatusRegister & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK)) {
                RxPktBaseAddress = RxPktBaseAddressPing;
                StatusRegister &= ~XEL_RSR_RECV_DONE_MASK;
                XEmacLite_mSetRxStatus(RxPktBaseAddress, StatusRegister);
                currentEmacBuff = PONG;
        }
        
        else{
                
                RxPktBaseAddressPong = RxPktBaseAddressPing + XEL_BUFFER_OFFSET;
                StatusRegister2 = XEmacLite_mGetRxStatus(RxPktBaseAddressPong);
                
                if ((currentEmacBuff==PONG)&&((StatusRegister2 & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK)) {
                        RxPktBaseAddress = RxPktBaseAddressPong;
                        StatusRegister2 &= ~XEL_RSR_RECV_DONE_MASK;
                        XEmacLite_mSetRxStatus(RxPktBaseAddress, StatusRegister2);
                        currentEmacBuff= PING;
                }
                
                else{
                        //Out of sync... should be corrected next packet
                }
                
                
        }
        
        //From here on out, RxPktBaseAddress is used... it is either PING or PONG
        

        
        
        //Extract the EtherType field (bytes[12:13]) from the received frame
        RxPktLengthType = XEmacLite_mGetReceiveDataLength(RxPktBaseAddress);
        
        //Some Ethernet frames use bytes[12:13] for length; others use it for type
        // If the field is > 0x600, it's a type; otherwise it's a length
        // See http://en.wikipedia.org/wiki/Ethernet_II_framing for details
        // The code below is borrowed from xemaclite.c
        if (RxPktLengthType > XEL_MAX_FRAME_SIZE){      //length field is type, not length
                if (RxPktLengthType == XEL_ETHER_PROTO_TYPE_IP){
                        //The packet is a an IP Packet
                        // Calculate the length based on the IP header's length field
                        RxPktLength = ((XEmacLite_mReadReg((RxPktBaseAddress),
                                                                                           XEL_HEADER_IP_LENGTH_OFFSET +
                                                                                           XEL_RXBUFF_OFFSET) >>
                                                        XEL_HEADER_SHIFT) & (
                                                                                                 XEL_RPLR_LENGTH_MASK_HI |
                                                                                                 XEL_RPLR_LENGTH_MASK_LO));
                        
                        RxPktLength += XEL_HEADER_SIZE + XEL_FCS_SIZE;
                }
                
                else if (RxPktLengthType == XEL_ETHER_PROTO_TYPE_ARP){
                        //The packet is an ARP Packet
                        // Update the length (every ARP pkt is the same length)
                        RxPktLength = XEL_ARP_PACKET_SIZE + XEL_HEADER_SIZE + XEL_FCS_SIZE;
                }
                
#ifdef WARPNET_ETHTYPE_SVR2NODE
                else if (RxPktLengthType == WARPNET_ETHTYPE_SVR2NODE){
                        //The packet is a WARPnet packet
                        waitForDMA = 1;
                        warpnetEthernetPktHeader* thePkt;
                        thePkt = (warpnetEthernetPktHeader*)(RxPktBaseAddress+XEL_RXBUFF_OFFSET);
                        RxPktLength = thePkt->pktLength;
                        //xil_printf("Got a WARPnet pkt on ethernet: %d bytes\r\n", RxPktLength);
                }
#endif
                else{
                        //Type is something else (non-IP, non-ARP)
                        //Punt on extracting the length here; tell the user
                        // it's the full MTU and let them handle it
                        //xil_printf("Got an unknown ethernetType: %x\r\n", RxPktLength);
                        RxPktLength = XEL_MAX_FRAME_SIZE;
                }
        }
        else {  //Ethernet frame length field really is length
                
                //Use the length in the frame, plus the header and trailer
                RxPktLength = RxPktLengthType + XEL_HEADER_SIZE + XEL_FCS_SIZE;
        }
        
        //Initiate the DMA transfer from EMAC rx buffer to OFDM PHY pkt buffer
        if(XDmaCentral_GetStatus(&DmaCentralInst) & XDMC_DMASR_BUSY_MASK == XDMC_DMASR_BUSY_MASK) {
                //DMA is busy cooking on something... just drop the packet
                return;
        }
        
        //Start the DMA
        XDmaCentral_Transfer(&DmaCentralInst, (u8 *)RxPktBaseAddress+XEL_RXBUFF_OFFSET, (u8 *)warpphy_getBuffAddr(controlStruct.txBuffIndex)+NUM_HEADER_BYTES, RxPktLength);
        
        if(waitForDMA)
        {
                u32 RegValue;
                //Wait until the DMA transfer is done by checking the Status register
                do {
                        RegValue = XDmaCentral_GetStatus(&DmaCentralInst);
                }
                while ((RegValue & XDMC_DMASR_BUSY_MASK) == XDMC_DMASR_BUSY_MASK);
        }
        
        //else...
        //This is a bit fast and loose. The DMA transfer does not block, which means the payload will not be completely copied into the PHY before the user's
        //callback is executed. However, the PHY is much slower than a DMA transfer. Therefore, even if it begins transmitting, the DMA will write the last bytes
        //before the PHY even gets to them.
        
        usr_emacCallback(RxPktLength,warpphy_getBuffAddr(controlStruct.txBuffIndex)+NUM_HEADER_BYTES);
        
        return;
}

///@brief ErrorTrap
///This is a wrapper around a print statement. The purpose of this function is provide
///a single line to comment in or out to disable or enable debug messages.
void ErrorTrap(char *Message){
        xil_printf("%s\r\n", Message);
        return;
}

///@brief Interrupt handler for the User I/O.
///
///This is a low-priority interrupt because it is primarily used for debugging purposes.
///The various user callbacks are executed, depending upon which button was depressed. Additionally,
///the board's dip switches also trigger this ISR, though the framework does not currently call user
///code in this event. We assume that dipswitches are currently only used for beginning-of-time
///state assignments. This will change in future releases.
void userIO_int_handler(void *InstancePtr){
        
        static unsigned int previousAssertedInputs;
        unsigned int assertedInputs;
        unsigned int newAssertedInputs;
        
        //Re-interpret the generic input pointer as a GPIO driver instance
    XGpio *GpioPtr = (XGpio *)InstancePtr;
        
        //Disable the GPIO core's interrupt output
    XGpio_InterruptDisable(GpioPtr, USERIO_CHAN_INPUTS);
        
        //Read the GPIO inputs; each 1 is a currently-asserted input bit
        assertedInputs = XGpio_DiscreteRead(&GPIO_UserIO, USERIO_CHAN_INPUTS) & USERIO_MASK_INPUTS;
        
        //XOR the current active bits with the previously active bits
        newAssertedInputs = (assertedInputs ^ previousAssertedInputs) & assertedInputs;
        previousAssertedInputs = assertedInputs;
        
        //Check whether push buttons or DIP switch triggered the interrupt
        // We assume a user callback per button, and another for the DIP switch
        if(newAssertedInputs & USERIO_MASK_PBC) usr_middlebutton();
        if(newAssertedInputs & USERIO_MASK_PBR) usr_rightbutton();
        if(newAssertedInputs & USERIO_MASK_PBL) usr_leftbutton();
        if(newAssertedInputs & USERIO_MASK_PBU) usr_upbutton();
        if(newAssertedInputs & USERIO_MASK_DIPSW) {
                dipswState = USERIO_MAP_DIPSW(assertedInputs); 
        }
        
        //Clear, acknowledge and re-enable the GPIO interrupt output
        XGpio_InterruptClear(GpioPtr, USERIO_CHAN_INPUTS);
        XIntc_Acknowledge(&Intc, XPAR_XPS_INTC_0_USER_IO_IP2INTC_IRPT_INTR);
        XGpio_InterruptEnable(GpioPtr, USERIO_CHAN_INPUTS);
        return;
}

///@brief Interrupt handler for the timer peripheral.
///
///The timer interrupt handler gets called when a hardware timer set by the
///user expires. The user's callback is called upon the completion of this event
void timer_int_handler() {
        timerIntStatus = warp_timer_getInterrupts();
        warp_timer_resetInterrupts();
        
        //Call User Function
        usr_timerCallback(controlStruct.timerType);
        
        XIntc_Acknowledge(&Intc,XPAR_XPS_INTC_0_WARP_TIMER_PLBW_0_TIMEREXPIRE_INTR);
        return;
}

///@brief This function stops the timer.
///
///Additionally it will return the amount of time remaining before expiration.
///@return Number of clock cycles remaining before expiration.
int warpmac_clearTimer(){
        int time;
        time = warp_timer_timeLeft(0);
        warp_timer_stop(0);
        controlStruct.currBackoff=0;
        return time;
}

///@brief This function sets the timer to countdown for a given number of clock cycles.
///@param clocks Number of 40MHz clock cycles to countdown from
void warpmac_setTimerVal(Xuint32 clocks){
        //Additional factor of two comes into play due to the fact that we moved the core to the 80MHz PLB when it used to be on the 40MHz OPB
        warp_timer_setVal(0, 2*clocks);
}

///@brief This function starts the timer in either a CSMA or non-CSMA mode.
///@param mode #ENABLECSMA if automatic carrier-sense pausing is desired. #DISABLECSMA if received energy
///is to be ignored.
void warpmac_startTimer(unsigned char mode){
        warp_timer_setMode(0,mode);
        warp_timer_start(0);
}

///@brief Generates a uniform random value between [0,(2^N - 1)], where N is a positive integer
///
///Used internally by WARPMAC for random exponential backoffs.
///@param N Window size for draw of uniform random value.
unsigned int randNum(unsigned int N){
        
        if(N<6) return ((unsigned int) rand()) >> (32-(N+4)); //N+6
        else return ((unsigned int) rand()) >> (32-(10)); //N+6
        
}

///@brief Returns a value corresponding to the instantaneous channel condition {busy or idle}
///
///@return 1 if medium is idle, 0 if medium is busy
unsigned int warpmac_carrierSense(){
        
        /* Two reasons for declaring the medium busy:
         1: The Rx PHY is actively receiving a packet.
         This only happens if packet detection and AGC already triggered, and a
         good/bad pkt interrupt will soon be asserted
         2: The packet detector indicates the average RSSI has exceeded the carrier sense
         threshold sometime in the last DIFS period
         */
        return ofdm_pktDetector_mimo_ReadReg_pktDet_idleDifs(PKTDET_BASEADDR) && !(0x80000000 & ofdm_txrx_mimo_ReadReg_Rx_packet_done(OFDM_BASEADDR));
}

///@brief Function is responsible for high-level MAC timing
///
///This function is used by user code, and in turn calls the other timer functions.
///It is capable of initiating either a deterministic timeout, or a random backoff.
///@param type #TIMEOUT for deterministic countdown, #BACKOFF for random exponential
void warpmac_setTimer(int type){
        unsigned int setTime;
        int myRandNum;
        int retval;
        switch(type) {
                case TIMEOUT:
                        controlStruct.timerType=TIMEOUT;
                        setTime = controlStruct.timeout*40;
                        warpmac_setTimerVal(setTime);
                        warpmac_startTimer(DISABLECSMA);
                        return;
                        break;
                case BACKOFF:
                        controlStruct.timerType=BACKOFF;
                        myRandNum = randNum(controlStruct.currBackoff);
                        setTime = myRandNum*controlStruct.slotTime*40;
                        if(controlStruct.currBackoff < controlStruct.maxBackoff){
                                controlStruct.currBackoff = controlStruct.currBackoff + 1;
                        }
                        /* Set the reset value of the timer (seconds * 40,000,000) */
                        if(setTime != 0){
                                warpmac_setTimerVal(setTime);
                                warpmac_startTimer(ENABLECSMA);
                                return;
                        }
                        if(setTime == 0){
                                usr_timerCallback(controlStruct.timerType);
                        }
                        break;
                        
        }
}

///@brief Pushes the given Macframe over ethernet - must come after warpmac_prepEmacForXmit
///@param packet Pointer to user's Macframe
///@return #XST_FAILURE or #XST_SUCCESS
int warpmac_startEmacXmit(Macframe* packet){
        u32 RegValue;
        /*
         * Wait until the DMA transfer is done by checking the Status register
         */
        do {
                RegValue = XDmaCentral_GetStatus(&DmaCentralInst);
        }
        while ((RegValue & XDMC_DMASR_BUSY_MASK) == XDMC_DMASR_BUSY_MASK);
        
        
        /*
         * If Bus error occurs, return Failure.
         */
        if (RegValue &  (XDMC_DMASR_BUS_ERROR_MASK)) {
                //      warpmac_incrementLEDLow();
                return XST_FAILURE;
        }
        
        //EMAC should have a complete packet; start the wired Tx
        u32 Register;
        //Copy back into emac;
        u32 BaseAddress;
        
        /*
         * Determine the expected TX buffer address
         */
        BaseAddress = XEmacLite_mNextTransmitAddr((XEmacLite *)&EmacLiteInstance);
        
        /*
         * Determine if the expected buffer address is empty
         */
        Register = XEmacLite_mGetTxStatus(BaseAddress);
        
        /*
         * If the expected buffer is available, fill it with the provided data
         * Align if necessary.
         */
        if (XEmacLite_mIsTxDone(BaseAddress)==TRUE) {
                
                /*
                 * Switch to next buffer if configured
                 */
                if (EmacLiteInstance.EmacLiteConfig.TxPingPong != 0) {
                        EmacLiteInstance.NextTxBufferToUse ^= XEL_BUFFER_OFFSET;
                }
                
                unsigned int length;
                length = (packet->header.length)-4;
                /*
                 * The frame is in the buffer, now send it
                 */
                XEmacLite_mWriteReg(BaseAddress, XEL_TPLR_OFFSET,
                                                        (length & (XEL_TPLR_LENGTH_MASK_HI |
                                                                           XEL_TPLR_LENGTH_MASK_LO)));
                
                /*
                 * Update the Tx Status Register to indicate that there is a
                 * frame to send.
                 * If the interrupts are enabled then set the
                 * XEL_TSR_XMIT_ACTIVE_MASK flag which is used by the interrupt
                 * handler to call the callback function provided by the user
                 * to indicate that the frame has been transmitted.
                 */
                Register = XEmacLite_mGetTxStatus(BaseAddress);
                Register |= XEL_TSR_XMIT_BUSY_MASK;
                if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) {
                        Register |= XEL_TSR_XMIT_ACTIVE_MASK;
                }
                XEmacLite_mSetTxStatus(BaseAddress, Register);
        }
        return XST_SUCCESS;
}

int warpmac_sendRawEthernetPacket(void* packet, unsigned int numBytes)
{
        u32 emacTxBufAddr, RegValue;

        emacTxBufAddr = XEmacLite_mNextTransmitAddr(&EmacLiteInstance);
        
        RegValue = XDmaCentral_GetStatus(&DmaCentralInst);
        
        //If Bus error occurs, return Failure.
        if (RegValue &  (XDMC_DMASR_BUS_ERROR_MASK)) {
                ErrorTrap("DMA threw bus error!\r\n");
                return XST_FAILURE;
        }

        XDmaCentral_Transfer(&DmaCentralInst, (u8 *)(packet), (u8 *)emacTxBufAddr, (numBytes));
        
        //Wait until the DMA transfer is done by checking the Status register
        do {
                RegValue = XDmaCentral_GetStatus(&DmaCentralInst);
        }
        while ((RegValue & XDMC_DMASR_BUSY_MASK) == XDMC_DMASR_BUSY_MASK);
        
        /*
         * If Bus error occurs, return Failure.
         */
        if (RegValue &  (XDMC_DMASR_BUS_ERROR_MASK)) {
                //      warpmac_incrementLEDLow();
                xil_printf("warpmac_sendRawEthernetPacket failed: XDMC_DMASR_BUS_ERROR_MASK\r\n");
                return XST_FAILURE;
        }
        
        //EMAC should have a complete packet; start the wired Tx
        u32 Register;
        //Copy back into emac;
        u32 BaseAddress;
        
        Register = XEmacLite_mGetTxStatus(emacTxBufAddr);
        
        //Wait for the EMAC to be ready
        while(XEmacLite_mIsTxDone(emacTxBufAddr)!=TRUE) {}

        //Switch to next buffer if configured
        if (EmacLiteInstance.EmacLiteConfig.TxPingPong != 0) {
                EmacLiteInstance.NextTxBufferToUse ^= XEL_BUFFER_OFFSET;
        }
        
        //The frame is in the buffer, now send it
        XEmacLite_mWriteReg(emacTxBufAddr, XEL_TPLR_OFFSET,
                                                ( (numBytes+4) & (XEL_TPLR_LENGTH_MASK_HI |
                                                                   XEL_TPLR_LENGTH_MASK_LO)));
        
        /*
         * Update the Tx Status Register to indicate that there is a
         * frame to send.
         * If the interrupts are enabled then set the
         * XEL_TSR_XMIT_ACTIVE_MASK flag which is used by the interrupt
         * handler to call the callback function provided by the user
         * to indicate that the frame has been transmitted.
         */
        Register = XEmacLite_mGetTxStatus(emacTxBufAddr);
        Register |= XEL_TSR_XMIT_BUSY_MASK;
        if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) {
                Register |= XEL_TSR_XMIT_ACTIVE_MASK;
        }
        XEmacLite_mSetTxStatus(emacTxBufAddr, Register);

        return XST_SUCCESS;
}

///@brief Starts a DMA transfer from the RX PHY to the EMAC for Ethernet transmission
///@param packet Pointer to user's Macframe
void warpmac_prepEmacForXmit(Macframe* packet){
        unsigned int length;
        length = (packet->header.length)-4;
        u32 BaseAddress,RegValue;
        BaseAddress = XEmacLite_mNextTransmitAddr(&EmacLiteInstance);
        
        
        RegValue = XDmaCentral_GetStatus(&DmaCentralInst);
        
        /*
         * If Bus error occurs, return Failure.
         */
        if (RegValue &  (XDMC_DMASR_BUS_ERROR_MASK)) {
                ErrorTrap("Bus Error\r\n");
        }
        XDmaCentral_Transfer(&DmaCentralInst, (u8 *)(warpphy_getBuffAddr(controlStruct.rxBuffIndex)+NUM_HEADER_BYTES), (u8 *)BaseAddress, length);
        
}

///@brief Attaches user callback to up button
///@param handler pointer to user's callback
void warpmac_setUpButtonCallback(void(*handler)()){
        usr_upbutton = handler;
}

///@brief Attaches user callback to left button
///@param handler pointer to user's callback
void warpmac_setLeftButtonCallback(void(*handler)()){
        usr_leftbutton = handler;
}

///@brief Attaches user callback to right button
///@param handler pointer to user's callback
void warpmac_setRightButtonCallback(void(*handler)()){
        usr_rightbutton = handler;
}

///@brief Attaches user callback to middle button
///@param handler pointer to user's callback
void warpmac_setMiddleButtonCallback(void(*handler)()){
        usr_middlebutton = handler;
}

///@brief Attaches user callback to timer
///@param handler pointer to user's callback
void warpmac_setTimerCallback(void(*handler)()){
        usr_timerCallback = handler;
}


///@brief Attaches user callback to the Emac
///@param handler pointer to user's callback
void warpmac_setEmacCallback(void(*handler)()){
        usr_emacCallback = handler;
}


///@brief Attaches user callback to PHY's good header interrupt
///@param handler pointer to user's callback
void warpmac_setGoodHeaderCallback(void(*handler)()){
        usr_goodHeaderCallback = handler;
}

///@brief Attaches user callback to PHY's bad packet interrupt
///@param handler pointer to user's callback
void warpmac_setBadHeaderCallback(void(*handler)()){
        usr_badHeaderCallback = handler;
}

void warpmac_setRxDoneCallback(void(*handler)()){
        usr_rxDoneCallback = handler;
}

///@brief Alternates the bottom two LEDs on the WARP board.
void warpmac_incrementLEDLow(){
        
        
        //Update the global variable we use to track which LED/segments are currently lit
        // The xps_gpio core doesn't allow outputs to be read from code, so we have to track this internally
        LEDHEX_Outputs = (USERIO_MAP_LEDS( (ledStatesLow[ledStatesIndexLow]|ledStatesHigh[ledStatesIndexHigh])) | USERIO_MAP_DISPR(rightHex) | USERIO_MAP_DISPL(leftHex));
        
        
        XGpio_DiscreteSet(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, LEDHEX_Outputs);
        ledStatesIndexLow = (ledStatesIndexLow+1)%2;
}


///@brief Alternates the top two LEDs on the WARP board.
void warpmac_incrementLEDHigh(){
        
        //Update the global variable we use to track which LED/segments are currently lit
        // The xps_gpio core doesn't allow outputs to be read from code, so we have to track this internally
        LEDHEX_Outputs = (USERIO_MAP_LEDS( (ledStatesLow[ledStatesIndexLow]|ledStatesHigh[ledStatesIndexHigh])) | USERIO_MAP_DISPR(rightHex) | USERIO_MAP_DISPL(leftHex));
        
        XGpio_DiscreteSet(&am